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MP4021A primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 1 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the future of analog ic technology description the MP4021A is a primary-side?control offline led lighting controller that achieves high power factor and accurate led current for isolated single-power-stage lighting applications in a single soic8 package. the proprietary real- current control method accurately controls led current from primary-side information. eliminating the secondary-side feedback components and the optocoupler significantly simplifies the led lighting system design. the MP4021A integrates power factor correction and works in boundary conduction mode to reduce the mosfet switching losses. the extremely low start-up current and quiescent current reduces the total power consumption and provides a high-efficiency solution for lighting applications. the multi-protection features of MP4021A greatly enhance system reliability and safety. the MP4021A features over-voltage protection, short- circuit protection, cycle-by-cycle current limiting, v cc uvlo, and auto-restart over-temperature protection. features ? real current control without secondary- feedback circuit ? typical 1.5% load regulation ? unique architecture for superior line regulation ? high power factor 0.9 over universal input voltage ? boundary conduction mode improves efficiency ? ultra-low (20a) start-up current ? low (1ma) quiescent current ? input uvlo ? cycle-by-cycle current limit ? over-voltage protection ? short-circuit protection ? over-temperature protection ? available in an soic8 package applications ? solid-state lighting ? industrial and commercial lighting ? residential lighting all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. the MP4021A is under patent pending. typical application emi filter mult optional for wide output voltage applications zcd vcc gate cs gnd fb/nc comp MP4021A 1 2 3 4 8 7 6 5 + +
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 2 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking mp4021gs-a soic8 mp4021-a * for tape & reel, add suffix ?z (e.g. mp4021gs-a?z); package reference 1 2 3 4 8 7 6 5 top view comp fb gnd cs mult zcd vcc gate soic8 absolute maxi mum ratings (1) input voltage v cc ..........................-0.3v to +30v zcd pin .............................................-7v to +7v other analog inputs and outputs .....-0.3v to 7v max. gate current .................................... 1.2a continuous power dissipation (t a = +25c) (2) soic8 ........................................................ 1.3w junction temperature ...............................150 c lead temperature ....................................260 c storage temperature............... -65 c to +150 c recommended operating conditions (3) supply voltage v cc ........................10.3v to 23v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc soic8 ....................................96 ...... 45 ... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operation conditions. 4) measured on jesd51-7 4-layer board.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 3 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics v cc = 14v, t a = +25 c, unless otherwise noted. parameter symbol condition min typ max units supply voltage operating range v cc after turn on 10.3 23 v turn-on threshold v cc_on v cc rising edge 12.6 13.6 14.6 v turn-off threshold v cc_off v cc falling edge 8.4 9.0 9.6 v hysteretic voltage v cc_hys 4.5 v supply current start-up current i startup v cc =11v 20 30 a quiescent current i q no switching 0.75 1 ma operating current i cc f s =70khz 2 3 ma multiplier operation range v mult 0 3 v gain k (5) 1 1/v error amplifier feedback voltage v fb 0.403 0.414 0.425 v transconductance (6) g ea 222 a/v upper clamp voltage v comp_h 5.3 5.65 6 v lower clamp voltage v comp_l 1.3 1.5 1.7 v max source current (6) i comp 75 a max sink current (6) i comp -400 a current sense comparator leading edge blanking time t leb 280 ns current sense clamp voltage v cs_clamp 2.3 2.5 2.7 v zero current detector zero current detect threshold v zcd_t v zcd falling edge 0.31 v zero current detect hysteresis v zcd_hys 650 mv zcd blanking time t leb_zcd after turn-off 1.8 2.5 3.2 s over-voltage blanking time t leb_ovp after turn-off 1.5 s over-voltage threshold v zcd_ovp 1.5 s delay after turn-off 5.1 5.4 5.7 v over-current blanking time t leb_ocp after turn-on, same as t leb 280 ns over-current threshold v zcd_ocp 280ns delay after turn-on 0.57 0.60 0.63 v minimum off time t off_min 2 3.5 5 s starter start timer period t start 130 s
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 4 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics (continued) v cc = 14v, t a = +25 c, unless otherwise noted. parameter symbol condition min typ max units gate driver output clamp voltage v gate_clamp v cc =23v 12 13.5 15 v minimum output voltage v gate_min v cc =v cc_off + 50mv 6.0 v max source current (6) i gate_source 1 a max sink current (6) i gate_sink -1.2 a notes: 5) the multiplier output is given by: v cs =k?v mult ? (v comp -1.5) 6) guaranteed by design.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 5 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions pin # name pin function 1 mult multiplier input. connect this pin to the tap of re sistor divider from the rectified voltage of the ac line. the half-wave sinusoid signal to this pi n provides a reference signal for the internal current control loop. 2 zcd zero-current detection. a negative going-edge tri ggers the turn-on signal of the external mosfet. connect this pin to a resistor divi der between the aux iliary winding to gnd. over- voltage condition is detected through zcd. every switching turn-off interval, if zcd voltage is higher than the over-voltage- protection (ovp) threshold after the 1.5s blanking time, the over-voltage protection will trigger and the system will stop switching until auto-restart comes. zcd pin can also monitor over-current condition. connect this pin thru a diode to a resistor divider between cs to gnd. every sw itching turn-on interval, if zcd voltage is higher than the over-current-protection (ocp ) threshold after the 280ns blanking time, the over-current protection will trigger and the system will stop switching until auto-restart comes. 3 vcc power supply input. this pin supplies the power for the control signal and the high-current mosfet grade drive output. bypass this pin to ground with an external bulk capacitor of typically 22f in parallel with a 100pf ceramic cap to reduce noise. 4 gate gate drive output. this totem pole output stage is able to drive a high-power mosfet with a peak current of 1a source capability and 1.2a sink capability. the high level voltage of this pin is clamped to 13.5v to avoid excessi ve gate drive voltage. and the low level voltage is higher than 6v to guarantee enough drive capacity. 5 cs current sense. the mosfet current is sensed vi a a sensing resistor to its source lead. the comparison between the resulting voltage and th e internal sinusoidal-current reference signal determines when the mosfet turns o ff. a feed-forward from the rectified ac line voltage connected to the current sense pin maxi mizes the line regulation. if the pin voltage is higher than the current limit threshold of 2.5v (after turn-on blanking) the gate drive will turn off. 6 gnd ground. current return for the c ontrol signal and the gate drive signal. 7 fb/nc feedback signal. leave this pin fl oating (nc) for primary-side control. 8 comp loop compensation input. connect a compensation network to stabilize the led drive and maintain an accurate led current.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 6 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performance charac teristics v in =110v ac /220v ac , 5 leds in series, i led =500ma, lm=2.2mh, n p :n s :n aux =144:24:27, unless otherwise noted.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 7 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =110v ac /220v ac , 5 leds in series, i led =500ma, lm=2.2mh, n p :n s :n aux =144:24:27, unless otherwise noted.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 8 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =110v ac /220v ac , v out =30v, i out_max =330ma, constant voltage control, lm=2.4mh, n p :n s :n aux =205:41:27, unless otherwise noted. pf line regulation load regulation pf line regulation pf vs. i out thd vs. i out load regulation -0.6% -0.5% -0.4% -0.3% -0.2% -0.1% 0.0% 0.1% 0.2% 0.3% 0.4% 0.5% 0.6% 80 120 160 200 240260 0.88 0.89 0.90 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 80 120 160 200 240 260 0 2 4 6 8 10 12 14 16 18 20 80 120 160 200 240 260 -5.0% -4.0% -3.0% -2.0% -1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 5.0% 6.0% 7.0% 8.0% 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0 5 10 15 20 25 30 35 40 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 9 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =110v ac /220v ac , v out =30v, i out_max =330ma, constant voltage control, lm=2.4mh, n p :n s :n aux =205:41:27, unless otherwise noted. v out (ac) 100mv/div. v out (ac) 100mv/div. v out (ac) 500mv/div. v out (ac) 500mv/div. v cc 5v/div. v comp 1v/div. v out 10v/div. i out 5a/div. v cc 5v/div. v comp 1v/div. v out 10v/div. i out 200ma/div. v cc 5v/div. v comp 1v/div. v out 10v/div. i out 200ma/div. v cc 5v/div. v comp 1v/div. v out 10v/div. i out 200ma/div.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 10 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =110v ac /220v ac , v out =30v, i out_max =330ma, constant voltage control, lm=2.4mh, n p :n s :n aux =205:41:27, unless otherwise noted. v comp 5v/div. v cc 5v/div. v cs 500mv/div. v zcd 1v/div. v comp 5v/div. v cc 5v/div. v cs 500mv/div. v zcd 1v/div.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 11 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. function diagram emi filter zcd gnd vcc cs gate mult comp n : 1 fb/nc latch of f o r restart otp current sense current limit multiplie r pwm / pfc zero current detection ovp uvlo power supply control protection current control power supply current sense real current control gate drive r zero current detection ocp figure 1?MP4021A function block diagram
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 12 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation the MP4021A is a primary-side control offline led controller which incorporates all the features for high-performance led lighting. the led current can be accurately controlled with the real current control method from the primary-side information. active power factor correction (pfc) eliminates unwanted harmonic noise to pollute the ac line. start up initially, vcc of the MP4021A is charged through the start up resistor from the ac line. when vcc reaches 13.6v, the control logic works and the gate drive signal begins to switch. then the power supply is taken over by the auxiliary winding. the MP4021A will shut down when vcc drops below 9v. boundary conduction mode operation during the external mosfet on time (t on ), the rectified input voltage (v bus ) applies to the primary-side inductor (lm), and the primary current (i pri ) increases linearly from zero to the peak value (i pk ). when the external mosfet turns off, the energy stored in the inductor is transferred to the secondary-side and turns on the secondary-side diode to power the load. the secondary current (i sec ) begins to decrease linearly from the peak value to zero. when the secondary current decreases to zero, the primary-side leakage inductance, magnetizing inductance and all the parasitic capacitances decrease the mosfet drain-source voltage? this decrease is also reflected on the auxiliary winding (see figure 2). the zero-current detector in the zcd pin generates the turn-on signal of the external mosfet when the zcd voltage falls below 0.31v (see figure 3). as a result, there are virtually no primary-switch turn-on losses and no secondary-diode reverse- recover losses. it ensures high efficiency and low emi noise. v d s v bus + n v out v bus i pk t of f t on t urn - on v zcd 0 i pri i sec / n figure 2?boundary conduction mode + vcc zcd auxiliary winding r zcd1 0.31v turn-on signal r zcd2 c zcd figure 3?zero current detector real current control the proprietary real-current control method allows the MP4021A to control the secondary- side led current from primary-side information. the mean output led current can be calculated approximately as: fb o s nv i 2r ? ? n?turn ratio of primary side to secondary side v fb ?the feedback reference voltage (typical 0.4v) r s ?the sensing resistor connected between the mosfet source and gnd.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 13 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. power factor correction the mult pin is connected to the tap of the resistor divider from the rectified instantaneous line voltage and fed as one input of the multiplier. the output of the multiplier will be shaped as sinusoid too. this signal provides the reference for the current comparator and comparing with the primary side inductor current which sets the primary peak current shaped as sinusoid with the input line voltage. high power factor can be achieved. inductor current multiplier output figure 4?power factor correction scheme the maximum voltage of the multiplier output to the current comparator is clamped to 2.5v to get a cycle-by-cycle current limitation. vcc under-voltage lockout when the vcc voltage drops below uvlo threshold 9v, the MP4021A stops switching and totally shuts down, the vcc will restart charging by the external start up resistor from ac line. figure 5 shows the typical waveform of vcc under-voltage lockout 13.6v 9v vcc gate switching pulses and regulates the vcc auxiliary winding takes charge protection happens figure 5?vcc under-voltage lockout auto starter the MP4021A integrates an auto starter, the starter starts timing when the mosfet is turned off, if zcd fails to send out another turn on signal after 130s, the starter will automatically send out the turn on signal which can avoid the ic unnecessary shut down by zcd missing detection. minimum off time the MP4021A operates with variable switching frequency, the frequency is changing with the input instantaneous line voltage. to limit the maximum frequency and get a good emi performance, MP4021A employs an internal minimum off time limiter?3.5s, show as figure 6. zcd gate 3.5us figure 6?minimum off time leading edge blanking in order to avoid the premature termination of the switching pulse due to the parasitic capacitance discharging at mosfet turning on, an internal leading edge blanking (leb) unit is employed between the cs pin and the current comparator input. during the blanking time, the path, cs pin to the current comparator input, is blocked. figure 7 shows the leading edge blanking. t leb =280 ns v cs t figure 7?leading edge blanking
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 14 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. output over-voltage protection (ovp) output over voltage protection can prevent the components from damage in the over voltage condition. the positive plateau of auxiliary winding voltage is proportional to the output voltage, the ovp uses the auxiliary winding voltage instead of directly monitoring the output voltage, the ovp sample is shown in figure 8. once the zcd pin voltage is higher than 5.4v, the ovp signal will be triggered and latched, the gate driver will be turned off and the ic work at quiescent mode, the vcc voltage dropped below the uvlo which will make the ic shut down and the system restarts again. the output ovp setting point can be calculated as: ?? = + aux zcd2 out _ ovp sec zcd1 zcd2 nr v5.4v nr r v out_ovp ?output over voltage protection point n aux ?the auxiliary winding turns n sec ?the secondary winding turns + 1.5s blanking vcc zcd auxiliary winding r zcd1 ovp signal 5.4v latch r zcd2 c zcd figure 8?ovp sample unit to avoid the mis-trigger ovp by the oscillation spike after the switch turns off, the ovp sampling has a t leb_ovp blanking period, typical 1.5s, shown in figure 9. the current-limiting resistor between the output of the aux-winding and the zcd resistor divider can also work as suppresser to avoid the ovp mis-trigger. v zcd 0v sampling here t leb _ovp figure 9?zcd voltage and ovp sample output short circuit protection the MP4021A clamps the cs pin voltage to less than 2.5v to limit the available output power. if the short circuit of the secondary-side occurs, the voltage of the auxiliary winding will fall down following the voltage of the secondary winding and the vcc drops to less than uv threshold and re-start the system. as supplementary, tie a resistor divider form cs sensing resistor to zcd pin, shown in figure 10. when the power mosfet in the primary-side is turned on, the zcd pin monitors the rising primary-side current, once the zcd pin reaches ocp threshold, typical 0.6v, the gate driver will be turned off to prevent the chip form damage and the ic works at quiescent mode, the vcc voltage dropped below the uvlo which will make the ic shut down and the system restarts again. please note that the value of the resistors to set the ocp threshold (r ocp1 & r ocp2 ) should be much smaller than those of the zcd zero- current detector (r zcd1 & r zcd2 ) 280ns blanking zc d ocp signal 0 . 6 v latch cs gate psr control primary winding v bus r ocp1 r ocp2 r cs d figure 10?ocp sample unit
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 15 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the primary-side ocp setting point can be calculated as: ?? ?= + ocp2 pri _ ocp cs d ocp1 ocp2 r ir v0.6v rr i pri_ocp ?primary-side over current protection point. for some applications, the primary-side inductance value is very small, the minimal-off time feature could make the system work in dcm at the zero-crossing of the bus voltage. to improve the ocp function in this condition, please remove c zcd and reduce the value of r zcd1 and r zcd2 proportionally. thermal shut down to prevent from any lethal thermal damage, when the inner temperature exceeds otp threshold, the MP4021A shuts down switching cycle and latched until vcc drop below uvlo and restart again. compensation for wide output voltage for wide output voltage applications, sample vcc level thru a resistor to comp pin. since the output voltage of aux-winding follows the output voltage, the resistor can import output voltage information to comp level to compensate the led current variation with different led voltage drop. the typical comp source current is only 75a and the tolerance could affect the action of the compensation. so the inject current form vcc should be smaller than 10a. the compensation resistor should be larger than 3m ? . design example for the design example, please refer to mps application note an059 for the detailed design procedure and information.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 16 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. primary-side consta nt-voltage control for led lighting application, a single-stage pfc converter needs large output capacitor to reduce the 100hz ripple. on the other hand, the two- stage solution is also proposed to remove the 100hz ripple from the led current. figure 11 shows a two-stage solution system based on MP4021A and mp2489, offline isolated pfc flyback constant-voltage regulator plus dc to dc led driver. figure 11?two-stage led driver solution the MP4021A can be designed as a primary- side constant-voltage control, offline isolated flyback controller with active power factor correction (pfc). the output voltage v o can be regulated without opto-coupler under a wide ac main input voltage range in a single-stage flyback converter. primary-side voltage control the MP4021A can implement feedback control function with fb pin. cs 0.4v ref ea real current control comp c comp i comp fb aux-winding r vs1 c vs r vs2 d vs r vlim figure 12?fb pin structure shown in figure 12, the fb signal is fed to the error amplifier and comparing with the 0.4v reference. so, at steady state, the average value of fb level will be regulated at 0.4v. the real current control block?s output is internally connected to fb with about 200k ? impedance, if there is no other external feedback signal on fb pin, the sample signal from cs pin is regulated. if there is external fb signal with low input impedance (<20k ? ) applied in fb pin, the external fb signal is regulated. this feature makes the MP4021A suitable both for primary side control application without other feedback signals and direct control application with external feedback signal applied. the fb pin is used to regulate the output voltage by sampling the aux-winding. as a flyback converter, during the flyback period, the primary mosfet is off and the secondary diode is conducting current. before the secondary current drops to zero, the aux-winding voltage is proportional to the output voltage. = ? aux aux o sec n vv n a simple d-r-c circuitry sample-holds the aux- winding voltage and a resistor divider reduces the amplitude to match the internal 0.4v reference. so the output voltage can be calculated as: + =? ? sec vs1 vs2 oref aux vs2 nrr vv nr the current-limit resistor r vlim helps to attenuate the energy of the leakage inductance to improve the voltage regulation precision. power factor correction same as cc mode, the mult pin is connected to the tap of the resistor divider from the rectified instantaneous line voltage and fed as one input of the multiplier. the comp level, which is regulated from the feedback signal, is fed as the other input of the internal multiplier. the output of the multiplier will be shaped as sinusoid wave too. this signal provides the reference for the current comparator and comparing with the primary side inductor current which sets the primary peak current shaped as sinusoid with the input line voltage. high power factor can be achieved.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 17 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. primary inductor current detection the system is based on the peak current mode control. a sensing resistor is tied from the source of the mosfet and ground to sample the primary inductor peak current. different from working in cc mode, since the MP4021A regulates the fb signal, the real current control signal from cs pin is shielded. the cs pin is just applied as primary peak current detector like traditional cv converter. tuning the value of the cs sensing resistor can change the comp level. with larger sensing resistor, the comp level is higher and with smaller sensing resistor, the comp level is lower. so, select a suitable sensing resistor to avoid the comp level to trigger upper/lower comp voltage. in order to avoid hitting the current limit, the voltage across the sensing resistor should be less than 80% of the worst case current limit voltage. and the clamp voltage on cs pin is typical 2.5v. loop compensation unlike voltage mode has only a single pole roll off due to the output filter, the MP4021A uses peak-current-mode control to achieve more stable control loop. since MP4021A is designed with pfc feature, so the loop response is very slow with large comp cap. for primary-side cc mode, the part samples the primary-side current. with large output cap, although the output voltage builds up slowly, the primary current should be not small, so the comp cap can not be charged to overshoot. for cv mode control, the feedback voltage is from the output voltage of the aux- winding, which reflects the output voltage of the secondary winding at flyback period. the impact of the slow loop response results in that the comp level is easy to be charged to overshoot or drops to normal level slowly. figure 13?comp pin structure a series capacitor-resistor combination net sets a pole-zero combination to control the characteristics of the control system. the c comp1 is a big-value capacitor (2.2f to10f) to achieve high pf and stable loop. the r comp1 in series with c comp adds a zero in the loop to improve the phase margin, it is helpful to limit the start-up voltage spike. as an option, a small-value capacitor c comp2 can also be applied to add a high-frequency pole to achieve a beneficial effect of attenuating high-frequency noise. feedforward compensation in order to limit the output voltage spike and improve the voltage regulation, adding feed- forward compensation from aux-winding feedback voltage to cs pin, shown in figure 14, fb aux-winding r vs1 c vs r vs2 d vs r vlim pri-winding ac line cs gate r sense r ff1 r ff2 zd figure 14?the feedforward compensation on cs pin
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 18 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the higher output voltage is, the higher feed- forward offset is. the zener diode is used to set the compensation trigger level. the resistor divider of r ff1 and r ff2 adjusts the action. once the output voltage rises up too high, the aux- winding output also rises up to break the zd to add a feedforward bias on cs pin, then the primary current is reduced quickly to prevent the output voltage from rising to the higher level further. with lower zener voltage range, the effect of the feedfoward compensation is enhanced, but the power loss is increased. dummy load for primary constant voltage control, sensing the output voltage requires the secondary diode conducts current, when the system is delivering power to the output. when the load is very light, the power consuming is very small. the conduction of the secondary diode becomes very short. the fb signal is hard to be coupled with the real output voltage. so the output voltage rises up to trigger ovp. the feedforward compensation greatly reduces the power delivered to output but a dummy load is still required to dissipate the remaining power to limit the voltage rising further. as a result, the dummy load increases the power loss of whole system to achieve the desired load regulation precision. protection different from cc mode control, cv mode makes the system can work in no load condition. so the ovp can not be triggered at normal operation. but the MP4021A can still set a ovp threshold thru zcd r-divider to prevent the components from damage in fault cases. other protection mechanisms, like scp, otp, cycle by cycle current limit, are all same as working in cc mode.
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 19 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application circuit vcc 3 gnd 6 gate 4 zcd 2 cs 5 fb 7 mult 1 comp 8 u1 MP4021A 250v/2a f1 4.7m h l1 22nf/2 75v ac cx1 con1 22nf/2 75v ac cx2 100nf/400 v c4 100pf c5 1m r3 510k r5 100pf c7 15.4 k r2 100 r13 56k r1 es1 d d3 22nf/6 30v c8 100k r6 1n4007 d2 cep 05n6 5 q1 20 r7 2.2 r9 499 r12 5m r10 f/10 v c10 30k r11 c3 ns con2 330 c1 bzt52 c27 d6 d5 1n414 8w 47pf c11 33 f/35v c2 4.02 k r4 1.1 r8 10 0v c6 1 r14 np:ns:naux =96:28:27 lp=1.665mh 4.7m h l2 2.2n f/25 0v cy1 300 r16 d1 1n414 8w 5.1k r17 5.1k r18 bd1 mb6s murs 320 t3 d4 2 1 aux+ 6 b w rm6 t1 68pf/6 30v c9 tvr10d 431 rv1 68 r15 r19 3m optional for wide output voltage applications figure 15?universal input, isolated flyback converter, drive 3-6 leds in series, 350ma led current for led bulb lighting t1 vcc 3 gnd 6 gate 4 zcd 2 cs 5 fb 7 mult 1 comp 8 u1 MP4021A 250v/3.15a f1 con1 47nf/275vac cx2 kbp206 bd1 100nf/400v c4 100pf c5 1m r3 7.32k r4 499k r5 100pf c7 30.9k r2 357 r13 100k r14 es1d d3 22nf/630v c8 100k r6 1n4007 d2 smk0870f q1 20 r7 3.3 r9 100 r12 c10 nc c9 30k r11 nc c3 con2 murs320t3 d4 0.4 r1 bzt52c20 d6 d5 1n4148 10pf c11 core: efd25 c6 c1 c2 1 r8 275vac rv1 3.3nf/2600v cy1 1mh l3 lp=2.06mh 750 r15 3k r16 d1 1n4148 5.1k r19 5.1k r18 1k r20 0 r21 nc r22 nc c12 2.2mh l1 2.2mh l2 np:ns:naux=126:36:20 10m r10 figure 16?universal input, isolated flyback converter, drive 9 leds in series, 500ma led current for 15w led tube lighting
MP4021A?primary side control offline led controller with active pfc MP4021A rev.1.04 www.monolithicpower.com 20 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. vcc 3 gnd 6 gate 4 zcd 2 cs 5 fb 7 mult 1 comp 8 u1 MP4021A 250v/2a f1 47nf/275vac cx1 con1 100pf c2 1m r1 499k r3 100pf c4 5.1k r13 357 r4 20k r14 es1g d3 10 r8 1 r11 510 r9 10m r7 c5 30k r15 con2 stth2r06 d6 bzt52c20 d2 d4 1n4148 6.8k r2 1 r10 c3 50m r12 np:naux=45:17 lp=0.4mh srl1422er t1 led+ led- 60v/350ma output: 600v/2a 210 r6 1.2k r5 d5 1n4148 q1 ap3990i 220nf/400v c1 1k r19 1k r18 1k r17 1k r16 68pf/630v c8 c6 bd1 df06s 1.8mh l1 1.8mh l2 1.2mh l3 figure 17?universal input, non-isolated buck-boost converter, drive 19 leds in series, 350ma led current for 21w led tube lighting vcc 3 gnd 6 gate 4 zcd 2 cs 5 fb 7 mult 1 comp 8 u1 MP4021A 250v/3.15a f1 47nf/275vac cx1 kbp206/600v/2a bd1 100nf/630v c2 2.2nf c1 1m/0.25w r4 5.6k/1% r5 510k/1%/0.5w r6 30.9k r18 51/1206 r7 es1d/200v/1a d2 22nf/630v c7 100k/1206 r15 1n4007 d3 smk0870f q1 20/1%/1206 r9 220 r10 ns r8 c6 5.1k/1206*5 r20 murs320t3 d6 efd20 c10 tvr10431ksy rv1 2.2nf/4000v cy1 3.2mh/0.5a l4 lp=2.4mh 750/1% r12 3k/1% r11 d4 1n4148w 10k/1206 r2 10k/1206 r1 10k/1206 r3 4.7mh/0.24a l2 4.7mh/0.24a l3 110k r17 10mh/0.7a l1 205ts 41ts 27ts 2 1 5 4 6 7 t1 0805 700v/8a 1000v/1a 75v/0.15a 200v/3a 30v/10w 85-265vac l n led+ led- vsample vsample c13 bav21w/200v/0.2a d7 270k/1% r23 5.6k/1% r24 c11 ns c12 bzt52c18/18v d8 100pf/50v c4 bzt52c27/27v d1 c3 910 r25 20/1206 r22 ns r13 200m/1%/1206 r14 1/1%/1206 r16 d5 1n4148w 10pf c8 ns r19 ns c9 5.1k r21 figure 18?universal input, isolated flyback converter, primary constant voltage control, 30v/10w output
MP4021A?primary side control offline led controller with active pfc notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP4021A rev. 1.04 www.monolithicpower.com 21 7/5/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information soic8 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) top view front view 0.228(5.80) 0.244(6.20) side view 14 85 recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation aa. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane

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